Feature - Busting the myth of immutable microprocessors

“Many Paths” © Sue O'Kieffe 2008 A whimsical representation of the myriad paths the logic can take through a reconfigurable microprocessor

Imagine reconfiguring your computer’s hardware to perform individual tasks as efficiently as possible.  It's new, it's green, and it's . . . well . . . challenging.

A standard computer’s hardware structure is fixed. To accomplish different tasks, its microprocessor runs different software programs. In a reconfigurable computing system — an up-and-coming technology pioneered by the National Science Foundation Center for High-performance Reconfigurable Computing (CHREC, pronounced “shreck”) and others — the hardware structure actually changes when performing different tasks. Reconfigurable hardware is proving capable of providing substantial improvements in power reduction and speed, in particular when applied to high-performance computing applications in areas such as DNA matching, protein sequencing, and cryptography.

In a reconfigurable computer, the main microprocessor contains an array of reconfigurable co-processor chips. A “master” microprocessor chip controls the co-processors and the pathways connecting them, optimizing the array for the task at hand. This allows the computer to run at much higher efficiencies, increasing the speed — up to four orders of magnitude in some cases — and reducing the power needed.

For certain types of scientific applications that involve pattern matching and sequence alignment, a single reconfigurable computer can achieve performance equivalent to a cluster of hundreds or thousands of general-purpose processors, said Jason Bakos, a developer of this technology at the University of South Carolina (not affiliated with CHREC).  “This represents a staggering achievement in computational efficiency and brings high-performance computing from the raised-floor, air conditioned server room to your desktop.”

Bakos knows first-hand what lies behind this achievement. A scientist colleague working on the evolutionary relatedness among groups of organisms — involving calculations that normally require an expensive large-scale cluster — asked Bakos to help him enhance his application by adapting it to run on a reconfigurable computing system. Bakos spent two years customizing a reconfigurable microchip for a single computer, adapting his colleague’s application to run on it and tweaking the design to speed up the calculations. In the end, the code ran 1,000 times faster than on a standard single computer and much more efficiently and cheaper than on a cluster.

Reconfigurable chips can also be combined with a cluster in a hybrid system to greatly exceed the cluster's performance, Bakos noted. In fact CHREC members have already done so.

This is a photo of a reconfigurable co-processor add-in (peripheral) card, containing two Field-Progammabe Gate Arrays (FPGA) that can be programmed to perform arbitrary hardware-based computations.  This is the same card that Bakos used to accelerate his colleague's application.  The two large chips (at right, covered with black fans) are Xilinx Virtex-2 Pro FPGAs and the smaller black chips surrounding them are high-speed Static Random Access Memory (SRAM) banks.  The connector at the bottom is a PCI-X interface that allows input and output data to be exchanged between the FPGAs and a host computer system. The yellow chip serves as the controller for this interface (coordinating the communication between the host and the FPGAs). Image courtesy of Jason Bakos.

As Bakos’ story illustrates, challenges remain before reconfigurable computing becomes widely used.  First, programming the reconfigurable chips requires skills and time that scientists typically don’t have. To address this, CHREC researchers are working to develop new algorithms allowing software applications to run on both conventional and reconfigurable processors.  They also aim to design reconfigurable chips that work for a broader range of applications.

“Custominzing a reconfigurable chip can be of similar complexity to designing computer hardware,” said CHREC co-director Tarek El-Ghazawi of The George Washington University. “We are working to make the programming of high-performance computers that contain such chips similar to programming for conventional high-performance computers so that reconfigurable chips can be easily used by scientists in a broad range of domains.”

—Amelia Williamson, for iSGTW